This spectacular GB202 die shot shows just how massive Nvidia’s RTX 5090 GPU is but it’s not the largest chip it’s ever shoehorned into a gaming graphics card
With Nvidia’s RTX 50 series launch at CES earlier this month and all the subsequent reviews of the RTX 5090, especially in-depth ones like our Dave’s, laying out all the specifications, we all know that the biggest Blackwell chip is one seriously big GPU. And thanks to a new die shot of the processor, we can now feast our eyes on all those shaders and cache.
Creating a detailed die shot of any processor isn’t simple. It takes many failed attempts, involving numerous cracked chips and skin burns, to perfect the process. If that chip just so happens to be an Nvidia GB202, the GPU powering the GeForce RTX 5090, then there are a few other barriers to overcome, namely getting your hands on one and being willing to sacrifice a $2,000+ graphics card for the sake of a picture.
GB202 Dieshot/5090 DieshotThanks By@ASUS Tony 俞元麟 by Chip@万扯淡 by Dieshot@Kurnalsalts LayoutPhoto1 GB202 DieshotPhoto2 AD102 vs GB202 full Pixel Photo pls join in Kurnal’s Telegram teamhttps://t.co/MI6oCa2yOA pic.twitter.com/pny7bvCs5jJanuary 25, 2025
Enter Tony Yu, general manager of Asus China and all-round top chap, to save the day, sharing a high-resolution image of the GB202 die thank X user Kurnal managed to grab hold of and then helpfully label all the key parts (via Tom’s Hardware).
While the image itself doesn’t reveal any major surprises, as Nvidia has stuck with the same fundamental design layout for many years now, it does that the engineers had to make some interesting decisions in order to get everything to fit within the die’s physical dimensions.
For example, if you look at the GB202 and compare it to the AD102 (the RTX 4090’s GPU), you’ll see that all of the logic blocks for the NVENC video encoders and decoders have moved from the bottom to the very middle of the chip.
The reason for this is twofold: firstly, the GB202 sports three encoders and two decoders, to the AD102’s two and one respectively, and it also has an aggregated 512-bit memory bus. If Nvidia had kept the NVENC blocks all at the bottom, then those 16 physical memory interfaces (PHYs) would have made the die very long/tall. Perhaps too tall.
Something else we can clearly see is the all that L2 cache in the very centre of the die. Where AMD uses a fast but complex multi-level cache hierarchy, Nvidia takes a simpler approach, resulting in a main L1 cache for each SM (Streaming Multiprocessor) and then a hulking L2 (last-level) cache, as well as some smaller ones dotted about in the SMs.
Other than that, the design is pretty straightforward. The full die comprises 12 GPCs (Graphics Processing Cluster), each sporting its own ‘Raster Engine’, also known as a ROPs cluster. Those GPCs are organised into eight TPCs (Texture Processing Units) and inside each of those, you’ll find two SMs—these house 128 CUDA cores apiece, for a grand total of 24,576 shader units.
But for all its massiveness, it’s not the biggest chip Nvidia has ever stuffed into a gaming graphics card. It is in terms of transistor and shader count but not in terms of physical dimensions. With an area of 750 mm2, the GB202 is 23% larger than the AD102 (609 mm2) and 19% larger than the GA102 (RTX 3090, 628 mm2).
However, it’s 0.5% smaller than the TU102 (754 mm2), the GPU in the RTX 2080 Ti, and 8% smaller than the GV100 (815 mm2). The latter, based on the Volta architecture, isn’t really a gaming GPU, but for a while, Nvidia marketed it as such. The Titan V was very much the ‘RTX 5090’ of its era (2017), not least because of its $2,999 price tag.
A little over 800 mm2 is about as large as a single die can go, due to the reticule limit, but the GB202 isn’t all that far off. Whether the next generations of GPUs are this big remains to be seen but if this is the last hurrah for monstrously huge, monolithic chips in gaming graphics cards, before switching to tiled or stacked chiplets, then at least we have this lovely die shot to stare at and try to spot when the RT and Tensor cores might be amidst in the ocean of transistors.
